Report by Mike Schwarz
An impressive and outstanding lecture took place on February 18, 2022. What was it about? The title of the lecture was “Impact, History and Future of Nanoelectronics”, given by Prof. Hiroshi Iwai, Vice Dean and Distinguished Professor from ICST. NYCU, Taiwan.
The distinguished lecture was organized by the EDS Germany Chapter and co-sponsored by the NanoP from THM – University of Applied Sciences. The DL was attended by 19 IEEE participants and 23 non IEEE members.
Prof. Iwai gave an outstanding overview and perspective of the next upcoming decade. He started with a historic review of the past and set focus on the performance increase of the last 115 years. He showed the essential KPI parameters of MOSFET devices and their impact regarding the performance limit of downsizing. Furthermore, Prof. Iwai offered where the physical limit of the real physical gate length will occur and what is the difference regarding the commercial nm technology names. The lecture contained detailed explanation of the four main impacts, i.e. punch through current, direct tunneling leakage, subthreshold leakage, and gate insulator leakage. Furthermore discussion took place, which effects could be avoided and which limit the physical gate length, e.g. direct tunneling impact.
After the discussion an outlook of the near future (next 15 years) was given, the movement towards nanosheet transistors and 3D stacking of those with experimental data. Approaches as die to wafer smart bonding and resistivity of narrow metal lines were presented by Prof. Iwai. The presentation continued with a far future outlook and the challenges to be accepted by potential engineers and scientists as the readers of this article. We need you!
Finally, Prof. Iwai referred to the differences between AI and the human brain and where the potentials and advantages of both are and how to combine and overcome the current bottlenecks. The lecture concluded with a following discussion on certain topics.